Development is proposed of an x-ray Pixel Array Detector (PAD) consisting approximately of 2,000x2,000 pixels to enhance macromolecular crystallographic data collection at synchrotron sources A PAD consists of an x-ray sensing integrated circuit layer bonded to a pixel electronics layer such that each pixel has its own processing electronics PADs promise to reduce data collection time by up to a factor of 40 relative to existing detectors while improving data quality They will have specific capability to 1 Collect a set of monochromatic data (90 [unreadable] rotation) in 18 seconds using the standard oscillation method (0 5 [unreadable] per frame, with exposure time of 100 ms per frame) 2 Collect a set of fine-slice data in 90 seconds with a rotation of 0 05 [unreadable] per frame and with an exposure of 50 ms per frame 3 Collect frames at microsecond exposure time for time-resolved protein Laue diffraction Research during Phase I of this proposal was successful in identifying a mixed-mode analog/digital pixel architecture best suited for the crystallographic application, as well as demonstrating ways of resolving radiation damage concerns The input signal is analog integrated onto a capacitor, C_nt,by a charge to voltage converter in the charge integrator stage using a structure very similar to the one in the existing APAD designs The voltage on the capacitor is constantly compared to an external reference voltage, Vref, via a voltage comparator in the threshold detector stage When the integrated voltage level reaches the reference voltage, a bit is generated and added into an in-pixel digital counter The threshold detector then also resets the integration capacitor in the charge integrator stage Thus, each analog cycle of filling C_ntresults in an additional digital "count" in the high- order word stored in the in-pixel digital counter At the end of the exposure frame, the voltage level remaining on Gin t is digitized, if desired, by an analog-to-digital converter (ADC) at the end of each row of pixels This digitized value is thus the low-order digital word of the exposure Phase II will involve finalization of the specific pixel layout, fabrication of suitably large-area integrated circuits, assembly and application testing of a full-scale PAD PERFORMANCESITE(S) (organization,city, state) 1 0 ADSC, 12550 Stowe Drive, Poway, CA, 92064 2 0 Cornell University, Physics Dept, Clark Hall, Ithaca, NY 14853 3 0 UCSD, 9500 Gilman Drive, La Jolla, CA, 92093 KEY PERSONNEL See instructions Use continuationpagesas needed to providethe requiredinformation in theformat shownbelow Startwith Principal InvestigatorListall other key personnelinalphabeticalorder,lastnamefirst Name Organization Role on Project Hamlin, Ronald, Ph D ADSC PI Allin, Matt ADSC Technician Angello, Susan, BS ADSC Process Development Electrical Engineer (TBD) BS ADSC Electronic Development Hontz, Tom MBA, MS ADSC Program Director/Pck Engr Nielsen, Chris, MA ADSC Software Engineer Vernon, Wayne, Ph D ADSC Test Engineer Gruner, Sol, Ph D Cornell PAD Development Tate, Mark, Ph D Cornell Design Engineering Nguyen-huu, Xuong, Ph D UCSD PAD Development Disclosure Permission Statement Applicableto SBIPJSTTROnly. Seeinstructions [] Yes [] No PHS 398 (Rev 05/01) face page 2 Form ApprovedThrough 05/2004 OMB No 0925-0001 RESEARCH GRANT TABLE OF CONTENTS Page Numbers Face Page ..................................... 1 2 Description,